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Int 2 computing coursework 2013

The Z80 CPU is an 8-bit based microprocessor. It was introduced by Zilog in 1976 as the startup company’s first product. The Zilog Z80 was a software-compatible extension int 2 computing coursework 2013 enhancement of the Intel 8080 and, like it, was mainly aimed at embedded systems. The Z80 was one of the most commonly used CPUs in the home computer market from the late 1970s to the mid-1980s.

Photo of the original Zilog Z80 microprocessor design in depletion-load nMOS. This actual chip manufactured in 1990. The Z80 came about when physicist Federico Faggin left Intel at the end of 1974 to found Zilog with Ralph Ungermann. By March 1976, Zilog had developed the Z80 as well as an accompanying assembler based development system for its customers, and by July 1976, this was formally launched onto the market.

Early Z80s were manufactured by Synertek and Mostek, before Zilog had its own manufacturing factory ready, in late 1976. Two separate register files, which could be quickly switched, to speed up response to interrupts such as fast asynchronous event handlers or a multitasking dispatcher. A built-in DRAM refresh mechanism that would otherwise have to be provided by external circuitry. A special reset function which clears only the program counter so that a single Z80 CPU could be used in a development system such as an in-circuit emulator.

The Z80 took over from the 8080 and its offspring, the 8085, in the processor market, and became one of the most popular 8-bit CPUs. For the original NMOS design, the specified upper clock frequency limit increased successively from the introductory 2. An approximate block diagram of the Z80. It is the PC and IR registers that are placed in a separate group, with a detachable bus segment, to allow updates of these registers in parallel with the main register bank. This original design allowed register H and L to be paired into a 16-bit address register HL In the 8080 this pairing was generalized into BC and DE, while HL also became usable as a 16-bit accumulator.

The 8080 also introduced the important 8-bit immediate data mode for accumulator operations and immediate 16-bit data for HL, BC and DE loads. The 16-bit IX and IY registers in the Z80 are primarily intended as base address-registers, where a particular instruction supplies a constant offset, but they are also usable as 16-bit accumulators, among other things. The Z80 also introduces a new signed overflow flag and complements the fairly simple 16-bit arithmetics of the 8080 with dedicated instructions for signed 16-bit arithmetics. As on the 8080, 8-bit registers are typically paired to provide 16-bit versions. EX AF,AF’ and EXX, each toggles one of two multiplexer flip-flops. This has sometimes been used to generate pseudorandom numbers in games, and also in software protection schemes.

This original syntax was later transformed into a new, somewhat more traditional, assembly language form for this same original 8008 chip. In this process, the mnemonic L, for LOAD, was replaced by various abbreviations of the words LOAD, STORE and MOVE, intermixed with other symbolic letters. 8086 syntax uses brackets instead of ordinary parentheses for this purpose. Because Intel claimed a copyright on their assembly mnemonics, a new assembly syntax had to be developed for the Z80. ADD and INC, use the same mnemonic regardless of addressing mode or operand size.

This is possible because the operands themselves carry enough information. Apart from naming differences, and despite a certain discrepancy in basic register structure, the Z80 and 8086 syntax are virtually isomorphic for a large portion of instructions. No multiply instructions are available in the original Z80. Different sizes and variants of additions, shifts, and rotates have somewhat differing effects on flags because most of the flag-changing properties of the 8080 were copied. The Z80 has six new LD instructions that can load the DE, BC, and SP register pairs from memory, and load memory from these three register pairs—unlike the 8080. Only the Zero and Carry flags can be tested for these new two-byte JR instructions.

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